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Silicon Devices

Download Arrix FPOA Data Sheet

Detailed timing, pin descriptions, configuration options and operating modes for the Arrix FPOA Product Family

Silicon Devices

Silicon Devices Overview

Field Programmable Object Arrays™ (FPOAs) are field re-programmable devices made up of hundreds of very high-performance, medium-grained “objects”. These objects are 16 bit configurable machines, such as an Arithmetic Logic Units (ALU), Multiply-Accumulators (MAC), or Register Files (RF). Each object operates deterministically at 1 GHz and is attached to the object array via a multitude of 1 GHz programmable interconnect. MathStar's rich selection of FPOA products allow you to tailor your design to meet your customer’s demanding needs and are supported by a wide range of development tools, applications & IP and documentation.

The Arrix Family of FPOAs supports 400 programmable objects, 64 bits of high-speed LVDS I/O, 96 general purpose I/O and two independent external memory interfaces. Arrix FPOAs offer 2.5 times more internal memory and twice the high speed I/O of previous generations of FPOA products.

Arrix FPOA
Product Guide

Maximum Operating Frequency
Temperature Range*
Package Type
FPOA Overview
Product Brief
Architecture Guide
Data Sheet
MOA2400D-10
1 GHz
Commercial
Standard
FPOA Overview
FPOA Product Brief
MOA2400D-09
900 MHz
Industrial
Standard
MOA2400D-08
800 MHz
Industrial
Standard
MOA2400D-06
600 MHz
Industrial
Standard
MOA2400D-10
1 GHz
Commercial
 
MOA2400D-09
900 MHz
Industrial
RoHS
MOA2400D-08
800 MHz
Industrial
RoHS
MOA2400D-06
600 MHz
Industrial
RoHS
*Industrial temperature range: -40 degrees Celsius to 125 degrees Celsius junction temperature

Silicon Objects

FPOA objects come in two basic types: core objects and periphery objects. Core objects operate at clock rates up to 1 GHz and typically perform high-speed computations. Periphery objects provide additional memory resources and access to I/O.
The three types of core objects are the Arithmetic Logic Unit (ALU) for logical and mathematical functions, the Multiply Accumulator (MAC) for 16x16 multiply-accumulate operations, and the Register File (RF) for buffering data as a FIFO or configurable RAM. Periphery objects include dedicated Internal RAM (IRAM), External DRAM (XRAM), High-Speed I/O (RX/TX) and General Purpose I/O (GPIO). All core and periphery objects are interconnected by a 1 GHz Programmable Communication Framework. The ratio and placement of different objects allow the FPOA to be programmed for high-performance image, video and signal processing applications. Learn more about the FPOA Architecture

1 GHz Programmable Communication Framework

Communication between objects is achieved via two complementary mechanisms. First, each object can transmit to or receive data from each of eight adjacent objects via Nearest Neighbor connections with zero latency. As the distance between objects increases, Party Line connections provide pipelined connectivity, allowing data transfer at the full core clock rate. For FPOAs operating at 1 GHz, Party Line connections provide data movement to a distance of up to four objects within a single clock cycle. Objects can be programmed to change communication patterns on a per-clock basis. Learn more about the FPOA Architecture

FPOA Initialization and Control

There are three interfaces involved in initialization and control. The PROM controller oversees the loading and initialization process of the FPOA. A JTAG controller provides an alternate way to load an FPOA configuration and provides access to memory, such as IRAM, to aid in debugging. The Control object can be used to stop the core clock - it also contains a PLL, which multiplies an external reference clock to generate the FPOA core clock. Learn more about the FPOA Architecture

If you would like to learn more about MathStar's silicon devices, please contact your local sales rep today.

Thank You!

MathStar specializes in high performance programmable logic solutions for image and digital signal processing. FPOAs offer up to four times the performance of today's top FPGAs.
MathStar: the next generation of programmable logic.